Does anybody have an idea of what operators are combined for the SCD stage ? Something tells me it uses a combination of lookup and transform operators , but it could also be change capture( with a possible interface to a Generator operator perhaps) . Does anybody have an in-depth understanding of this stage ?
What would be the effect if I disabled combination for this stage?
Thanks
Ramesh
SCD Stage Operators
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An Update : Yes i found much to my dismay it does use a transform operator . I tried compiling a job with SCD stage
and here's the error I got
and here's the error I got
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##W IIS-DSEE-TBLD-00000 17:29:56(012) <main_program> Error when checking composite operator: Output from subprocess: sh: /usr/vacpp/bin/xlC_r: not found.
##I IIS-DSEE-TBLD-00079 17:29:56(013) <transform> Error when checking composite operator: /usr/vacpp/bin/xlC_r -O -I/datastage/IBM/InformationServer/Server/PXEngine/include -O -q64 -c /datastage/IBM/InformationServer/Server/Projects/CVM_Dev/RT_BP671.O/V0S1_Test_SCD2_Slowly_Changing_Dimension_1.C -o /datastage/IBM/InformationServer/Server/Projects/CVM_Dev/RT_BP671.O/V0S1_Test_SCD2_Slowly_Changing_Dimension_1.tmp.o.
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Yes, I heard you on the range lookup issue also. Another place where a compiler is a must would be the custom compile flags in the lookup stage.
The compiler license is being checked with IBM. (point to ponder : Looks like the compiler licensing is also based on number of individual cores within a single processor )
That raises an interesting question ( some may consider this off topic) - Does Orchestrate parallelism recognize cores for partitioning data and does it internally execute instructions in parallel on a single processor with multiple cores ?
The compiler license is being checked with IBM. (point to ponder : Looks like the compiler licensing is also based on number of individual cores within a single processor )
That raises an interesting question ( some may consider this off topic) - Does Orchestrate parallelism recognize cores for partitioning data and does it internally execute instructions in parallel on a single processor with multiple cores ?
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Cores relate only to licensing ("processor value units").
Nodes, and therefore partitioning, are driven purely from what's in the configuration file. As Craig notes, these are a logical concept.
Nodes, and therefore partitioning, are driven purely from what's in the configuration file. As Craig notes, these are a logical concept.
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Any contribution to this forum is my own opinion and does not necessarily reflect any position that IBM may hold.
Any contribution to this forum is my own opinion and does not necessarily reflect any position that IBM may hold.