Buildop stage

[ravi123]

Hi

I design the Buildop stage, I am geeting this eror, Please give the Suggestion.


Seq-----------Buldops stage-------------------------seq




Code

if(b==0 || indata.b<mindiv){

transferAndWriteRecord(1);

//rej.a=indata.a;
//rej.b=indata.b;
//writeRecord(1);

}else{

doTransfer(0);

q=indata.a;
div=indata.b;

res=indata.a/indata.b;
rem=(indata.a)%(indata.b);

writeRecord(0);
}


Error


Operator Generation Failed

buildop -f -BC /usr/vacpp/bin/xlC_r -BL /usr/vacpp/bin/xlC_r -C buildop -H buildop -O buildop -W buildop buildop/divide1.opd

##E TCBO 000000 Output 0 has a schema variable, but input 0 does not.

[Madhavan VM]

Hi,

Please check the following:

1. Did u inlcude the header file #include "iostream.h"?
2. I have not seen reading the record, so I assume that you have given auto read as true. If not read the record.
3. Check whether you have defined all the variables in the pre-loop.

[ravi123]

Hi,

Please check the following:

1. Did u inlcude the header file #include "iostream.h"?
2. I have not seen reading the record, so I assume that you have given auto read as true. If not read the record.
3. Check whether you have defined all the variables in the pre-loop.

I mension This code in Pre-Recorder tab


if(b==0 || indata.b<mindiv){

transferAndWriteRecord(1);

//rej.a=indata.a;
//rej.b=indata.b;
//writeRecord(1);

}else{

doTransfer(0);

q=indata.a;
div=indata.b;

res=indata.a/indata.b;
rem=(indata.a)%(indata.b);

writeRecord(0);
}


2) i mension Auto Read is True and Auto wite is True

3) I did not menstion any information in pre loop tab and post loop, because i dont have a idea.


Can you please give me the Suggestion.

Thanks
ravi

[ravi123]

Hi,

Please check the following:

1. Did u inlcude the header file #include "iostream.h"?
2. I have not seen reading the record, so I assume that you have given auto read as true. If not read the record.
3. Check whether you have defined all the variables in the pre-loop.

I mension This code in Pre-Recorder tab


if(b==0 || indata.b<mindiv){

transferAndWriteRecord(1);

//rej.a=indata.a;
//rej.b=indata.b;
//writeRecord(1);

}else{

doTransfer(0);

q=indata.a;
div=indata.b;

res=indata.a/indata.b;
rem=(indata.a)%(indata.b);

writeRecord(0);
}


2) i mension Auto Read is True and Auto wite is True

3) I did not menstion any information in pre loop tab and post loop, because i dont have a idea.


Can you please give me the Suggestion.

Thanks
ravi

[Madhavan VM]

Ravi,

If auto write is true then why are you writing the record using explicit WriteRecord command. Set auto transfer also as true. Define the variables like mindiv, q,div res,rem in the pre-loop tab as to what data type they are. For eg. int mindiv;

save and compile and let us know what happens

[Kirtikumar]

I was getting a similar error today and found only one of the posts which talks about this message.

After debugging it found out that if you do not define input or output schemas for build op or define an array with size 0 you get this error.

Though it is very old post, thought of sharing the solution in case anyone else faces this.

[ray.wurlod]

Make sure, too, that you don't use reserved words as variable names.